9e: 0c 94 ce 03 jmp 0x79c ; 0x79c <_exit> 000000a2 <__bad_interrupt>: a2: 0c 94 00 00 jmp 0 ; 0x0 <__vectors> 000000a6 : void make_ip(uint8_t *buf); void make_arp_answer_from_request(uint8_t *buf); void make_echo_reply_from_request(uint8_t *buf,uint16_t len); uint16_t checksum(uint8_t *buf, uint16_t len)// вычисляем контрольную сумму для ip заголовка { a6: ef 92 push r14 a8: ff 92 push r15 aa: 0f 93 push r16 ac: 1f 93 push r17 ae: cf 93 push r28 b0: df 93 push r29 b2: 7c 01 movw r14, r24 b4: 8b 01 movw r16, r22 b6: ec 01 movw r28, r24 b8: 20 e0 ldi r18, 0x00 ; 0 ba: 30 e0 ldi r19, 0x00 ; 0 bc: 40 e0 ldi r20, 0x00 ; 0 be: 50 e0 ldi r21, 0x00 ; 0 c0: 0f c0 rjmp .+30 ; 0xe0 uint32_t sum = 0; while(len >1) {sum += 0xFFFF & (*buf<<8|*(buf+1)); c2: f8 81 ld r31, Y c4: e0 e0 ldi r30, 0x00 ; 0 c6: 89 81 ldd r24, Y+1 ; 0x01 c8: 90 e0 ldi r25, 0x00 ; 0 ca: 8e 2b or r24, r30 cc: 9f 2b or r25, r31 ce: a0 e0 ldi r26, 0x00 ; 0 d0: b0 e0 ldi r27, 0x00 ; 0 d2: 28 0f add r18, r24 d4: 39 1f adc r19, r25 d6: 4a 1f adc r20, r26 d8: 5b 1f adc r21, r27 buf+=2; da: 22 96 adiw r28, 0x02 ; 2 len-=2; dc: 62 50 subi r22, 0x02 ; 2 de: 70 40 sbci r23, 0x00 ; 0 void make_echo_reply_from_request(uint8_t *buf,uint16_t len); uint16_t checksum(uint8_t *buf, uint16_t len)// вычисляем контрольную сумму для ip заголовка { uint32_t sum = 0; while(len >1) e0: 62 30 cpi r22, 0x02 ; 2 e2: 71 05 cpc r23, r1 e4: 70 f7 brcc .-36 ; 0xc2 e6: f8 01 movw r30, r16 e8: ee 7f andi r30, 0xFE ; 254 ea: ee 0d add r30, r14 ec: ff 1d adc r31, r15 {sum += 0xFFFF & (*buf<<8|*(buf+1)); buf+=2; len-=2; } if (len) ee: 00 ff sbrs r16, 0 f0: 0d c0 rjmp .+26 ; 0x10c { sum += (0xFF & *buf)<<8; f2: 90 81 ld r25, Z f4: 80 e0 ldi r24, 0x00 ; 0 f6: aa 27 eor r26, r26 f8: 97 fd sbrc r25, 7 fa: a0 95 com r26 fc: ba 2f mov r27, r26 fe: 02 c0 rjmp .+4 ; 0x104 } while (sum>>16) { sum = (sum & 0xFFFF)+(sum >> 16); 100: 40 70 andi r20, 0x00 ; 0 102: 50 70 andi r21, 0x00 ; 0 104: 28 0f add r18, r24 106: 39 1f adc r19, r25 108: 4a 1f adc r20, r26 10a: 5b 1f adc r21, r27 } if (len) { sum += (0xFF & *buf)<<8; } while (sum>>16) 10c: ca 01 movw r24, r20 10e: aa 27 eor r26, r26 110: bb 27 eor r27, r27 112: 00 97 sbiw r24, 0x00 ; 0 114: a1 05 cpc r26, r1 116: b1 05 cpc r27, r1 118: 99 f7 brne .-26 ; 0x100 11a: 20 95 com r18 11c: 30 95 com r19 { sum = (sum & 0xFFFF)+(sum >> 16); } return( (uint16_t) sum ^ 0xFFFF); } 11e: c9 01 movw r24, r18 120: df 91 pop r29 122: cf 91 pop r28 124: 1f 91 pop r17 126: 0f 91 pop r16 128: ff 90 pop r15 12a: ef 90 pop r14 12c: 08 95 ret 0000012e : void init_ip_arp(uint8_t *mymac,uint8_t *myip)// функция генерации ip- и MAC-адресов, которые будут переданы в пакет и фрейм соответственно { 12e: ac 01 movw r20, r24 130: 20 e0 ldi r18, 0x00 ; 0 132: 30 e0 ldi r19, 0x00 ; 0 uint8_t i=0; while(i<4) { ipaddr[i]=myip[i];// присваиваем ip-адресу, который впоследствии будет отправлен в ip- пакете значение нашего ip 134: f9 01 movw r30, r18 136: e0 5f subi r30, 0xF0 ; 240 138: fe 4f sbci r31, 0xFE ; 254 13a: db 01 movw r26, r22 13c: a2 0f add r26, r18 13e: b3 1f adc r27, r19 140: 8c 91 ld r24, X 142: 80 83 st Z, r24 144: 2f 5f subi r18, 0xFF ; 255 146: 3f 4f sbci r19, 0xFF ; 255 } void init_ip_arp(uint8_t *mymac,uint8_t *myip)// функция генерации ip- и MAC-адресов, которые будут переданы в пакет и фрейм соответственно { uint8_t i=0; while(i<4) 148: 24 30 cpi r18, 0x04 ; 4 14a: 31 05 cpc r19, r1 14c: 99 f7 brne .-26 ; 0x134 14e: 20 e0 ldi r18, 0x00 ; 0 150: 30 e0 ldi r19, 0x00 ; 0 i++; } i=0; while(i<6) { macaddr[i]=mymac[i];// присваиваем MAC-адресу, который впоследствии будет отправлен в Ethernet-фрейме значение нашего MAC 152: f9 01 movw r30, r18 154: e6 5f subi r30, 0xF6 ; 246 156: fe 4f sbci r31, 0xFE ; 254 158: da 01 movw r26, r20 15a: a2 0f add r26, r18 15c: b3 1f adc r27, r19 15e: 8c 91 ld r24, X 160: 80 83 st Z, r24 162: 2f 5f subi r18, 0xFF ; 255 164: 3f 4f sbci r19, 0xFF ; 255 { ipaddr[i]=myip[i];// присваиваем ip-адресу, который впоследствии будет отправлен в ip- пакете значение нашего ip i++; } i=0; while(i<6) 166: 26 30 cpi r18, 0x06 ; 6 168: 31 05 cpc r19, r1 16a: 99 f7 brne .-26 ; 0x152 { macaddr[i]=mymac[i];// присваиваем MAC-адресу, который впоследствии будет отправлен в Ethernet-фрейме значение нашего MAC i++; } } 16c: 08 95 ret 0000016e : uint8_t eth_type_is_arp_and_my_ip(uint8_t *buf,uint16_t len)// функция проверки, является ли полученный пакет ARP-запросом и предназначен ли нам? { 16e: fc 01 movw r30, r24 uint8_t i=0; if (len<41) 170: 69 32 cpi r22, 0x29 ; 41 172: 71 05 cpc r23, r1 174: b0 f0 brcs .+44 ; 0x1a2 { return(0); } if(buf[ETH_TYPE_H_P] != ETHTYPE_ARP_H_V || buf[ETH_TYPE_L_P] != ETHTYPE_ARP_L_V) 176: 84 85 ldd r24, Z+12 ; 0x0c 178: 88 30 cpi r24, 0x08 ; 8 17a: 99 f4 brne .+38 ; 0x1a2 17c: 85 85 ldd r24, Z+13 ; 0x0d 17e: 86 30 cpi r24, 0x06 ; 6 180: 81 f4 brne .+32 ; 0x1a2 182: df 01 movw r26, r30 184: 96 96 adiw r26, 0x26 ; 38 186: e0 e1 ldi r30, 0x10 ; 16 188: f1 e0 ldi r31, 0x01 ; 1 { return(0); } while(i<4) { if(buf[ETH_ARP_DST_IP_P+i] != ipaddr[i]) 18a: 9c 91 ld r25, X 18c: 80 81 ld r24, Z 18e: 98 17 cp r25, r24 190: 41 f4 brne .+16 ; 0x1a2 192: 11 96 adiw r26, 0x01 ; 1 194: 31 96 adiw r30, 0x01 ; 1 } if(buf[ETH_TYPE_H_P] != ETHTYPE_ARP_H_V || buf[ETH_TYPE_L_P] != ETHTYPE_ARP_L_V) { return(0); } while(i<4) 196: 81 e0 ldi r24, 0x01 ; 1 198: e4 31 cpi r30, 0x14 ; 20 19a: f8 07 cpc r31, r24 19c: b1 f7 brne .-20 ; 0x18a 19e: 81 e0 ldi r24, 0x01 ; 1 1a0: 08 95 ret 1a2: 80 e0 ldi r24, 0x00 ; 0 return(0); } i++; } return(1);//в случае успеха возвращает значение 1 } 1a4: 08 95 ret 000001a6 : uint8_t eth_type_is_ip_and_my_ip(uint8_t *buf,uint16_t len)// функция проверки, адресован ли полученный IP пакет нам? { 1a6: fc 01 movw r30, r24 uint8_t i=0; if (len<42) 1a8: 6a 32 cpi r22, 0x2A ; 42 1aa: 71 05 cpc r23, r1 1ac: d0 f0 brcs .+52 ; 0x1e2 { return(0); } if(buf[ETH_TYPE_H_P]!=ETHTYPE_IP_H_V || buf[ETH_TYPE_L_P]!=ETHTYPE_IP_L_V) 1ae: 84 85 ldd r24, Z+12 ; 0x0c 1b0: 88 30 cpi r24, 0x08 ; 8 1b2: b9 f4 brne .+46 ; 0x1e2 1b4: 85 85 ldd r24, Z+13 ; 0x0d 1b6: 88 23 and r24, r24 1b8: a1 f4 brne .+40 ; 0x1e2 { return(0); } if (buf[IP_HEADER_LEN_VER_P]!=0x45) 1ba: 86 85 ldd r24, Z+14 ; 0x0e 1bc: 85 34 cpi r24, 0x45 ; 69 1be: 89 f4 brne .+34 ; 0x1e2 1c0: df 01 movw r26, r30 1c2: e0 e1 ldi r30, 0x10 ; 16 1c4: f1 e0 ldi r31, 0x01 ; 1 { return(0); } while(i<4) { if(buf[IP_DST_P+i]!=ipaddr[i]) 1c6: 5e 96 adiw r26, 0x1e ; 30 1c8: 9c 91 ld r25, X 1ca: 5e 97 sbiw r26, 0x1e ; 30 1cc: 80 81 ld r24, Z 1ce: 98 17 cp r25, r24 1d0: 41 f4 brne .+16 ; 0x1e2 1d2: 11 96 adiw r26, 0x01 ; 1 1d4: 31 96 adiw r30, 0x01 ; 1 } if (buf[IP_HEADER_LEN_VER_P]!=0x45) { return(0); } while(i<4) 1d6: 81 e0 ldi r24, 0x01 ; 1 1d8: e4 31 cpi r30, 0x14 ; 20 1da: f8 07 cpc r31, r24 1dc: a1 f7 brne .-24 ; 0x1c6 1de: 81 e0 ldi r24, 0x01 ; 1 1e0: 08 95 ret 1e2: 80 e0 ldi r24, 0x00 ; 0 return(0); } i++; } return(1);//если да, то возвращает 1 } 1e4: 08 95 ret 000001e6 : void make_eth(uint8_t *buf)//функция замены MAC-адреса источника на МАС-адрес получателя { 1e6: fc 01 movw r30, r24 1e8: aa e0 ldi r26, 0x0A ; 10 1ea: b1 e0 ldi r27, 0x01 ; 1 uint8_t i=0; while(i<6) { buf[ETH_DST_MAC +i]=buf[ETH_SRC_MAC +i]; 1ec: 86 81 ldd r24, Z+6 ; 0x06 1ee: 80 83 st Z, r24 buf[ETH_SRC_MAC +i]=macaddr[i]; 1f0: 8d 91 ld r24, X+ 1f2: 86 83 std Z+6, r24 ; 0x06 1f4: 31 96 adiw r30, 0x01 ; 1 } void make_eth(uint8_t *buf)//функция замены MAC-адреса источника на МАС-адрес получателя { uint8_t i=0; while(i<6) 1f6: 81 e0 ldi r24, 0x01 ; 1 1f8: a0 31 cpi r26, 0x10 ; 16 1fa: b8 07 cpc r27, r24 1fc: b9 f7 brne .-18 ; 0x1ec { buf[ETH_DST_MAC +i]=buf[ETH_SRC_MAC +i]; buf[ETH_SRC_MAC +i]=macaddr[i]; i++; } } 1fe: 08 95 ret 00000200 : void fill_ip_hdr_checksum(uint8_t *buf)// функция генерации контрольной суммы, флагов, времени жизни для отправляемого IP пакета { 200: 0f 93 push r16 202: 1f 93 push r17 204: 8c 01 movw r16, r24 uint16_t ck; buf[IP_CHECKSUM_P]=0; 206: fc 01 movw r30, r24 208: 10 8e std Z+24, r1 ; 0x18 buf[IP_CHECKSUM_P+1]=0; 20a: 11 8e std Z+25, r1 ; 0x19 buf[IP_FLAGS_P]=0x40; 20c: 80 e4 ldi r24, 0x40 ; 64 20e: 84 8b std Z+20, r24 ; 0x14 buf[IP_FLAGS_P+1]=0; 210: 15 8a std Z+21, r1 ; 0x15 buf[IP_TTL_P]=64; 212: 86 8b std Z+22, r24 ; 0x16 ck=checksum(&buf[IP_P], IP_HEADER_LEN); 214: c8 01 movw r24, r16 216: 0e 96 adiw r24, 0x0e ; 14 218: 64 e1 ldi r22, 0x14 ; 20 21a: 70 e0 ldi r23, 0x00 ; 0 21c: 0e 94 53 00 call 0xa6 ; 0xa6 buf[IP_CHECKSUM_P]=ck>>8; 220: f8 01 movw r30, r16 222: 90 8f std Z+24, r25 ; 0x18 buf[IP_CHECKSUM_P+1]=ck& 0xff; 224: 81 8f std Z+25, r24 ; 0x19 } 226: 1f 91 pop r17 228: 0f 91 pop r16 22a: 08 95 ret 0000022c : void make_ip(uint8_t *buf)//функция генерации ip пакета для отправления { 22c: ac 01 movw r20, r24 22e: fc 01 movw r30, r24 230: a0 e1 ldi r26, 0x10 ; 16 232: b1 e0 ldi r27, 0x01 ; 1 uint8_t i=0; while(i<4) { buf[IP_DST_P+i]=buf[IP_SRC_P+i]; 234: 82 8d ldd r24, Z+26 ; 0x1a 236: 86 8f std Z+30, r24 ; 0x1e buf[IP_SRC_P+i]=ipaddr[i]; 238: 8d 91 ld r24, X+ 23a: 82 8f std Z+26, r24 ; 0x1a 23c: 31 96 adiw r30, 0x01 ; 1 } void make_ip(uint8_t *buf)//функция генерации ip пакета для отправления { uint8_t i=0; while(i<4) 23e: 81 e0 ldi r24, 0x01 ; 1 240: a4 31 cpi r26, 0x14 ; 20 242: b8 07 cpc r27, r24 244: b9 f7 brne .-18 ; 0x234 { buf[IP_DST_P+i]=buf[IP_SRC_P+i]; buf[IP_SRC_P+i]=ipaddr[i]; i++; } fill_ip_hdr_checksum(buf); 246: ca 01 movw r24, r20 248: 0e 94 00 01 call 0x200 ; 0x200 } 24c: 08 95 ret 0000024e : #define waitspi() while(!(SPSR&(1< // read data SPDR = 0x00; 25e: 1e bc out 0x2e, r1 ; 46 waitspi(); 260: 0d b4 in r0, 0x2d ; 45 262: 07 fe sbrs r0, 7 264: fd cf rjmp .-6 ; 0x260 // do dummy read if needed (for mac and mii, see datasheet page 29) if(address & 0x80) 266: 67 ff sbrs r22, 7 268: 04 c0 rjmp .+8 ; 0x272 { SPDR = 0x00; 26a: 1e bc out 0x2e, r1 ; 46 waitspi(); 26c: 0d b4 in r0, 0x2d ; 45 26e: 07 fe sbrs r0, 7 270: fd cf rjmp .-6 ; 0x26c } // release CS CSPASSIVE; 272: 2a 9a sbi 0x05, 2 ; 5 return(SPDR); 274: 8e b5 in r24, 0x2e ; 46 } 276: 08 95 ret 00000278 : void enc28j60WriteOp(uint8_t op, uint8_t address, uint8_t data) { CSACTIVE; 278: 2a 98 cbi 0x05, 2 ; 5 // issue write command SPDR = op | (address & ADDR_MASK); 27a: 6f 71 andi r22, 0x1F ; 31 27c: 68 2b or r22, r24 27e: 6e bd out 0x2e, r22 ; 46 waitspi(); 280: 0d b4 in r0, 0x2d ; 45 282: 07 fe sbrs r0, 7 284: fd cf rjmp .-6 ; 0x280 // write data SPDR = data; 286: 4e bd out 0x2e, r20 ; 46 waitspi(); 288: 0d b4 in r0, 0x2d ; 45 28a: 07 fe sbrs r0, 7 28c: fd cf rjmp .-6 ; 0x288 CSPASSIVE; 28e: 2a 9a sbi 0x05, 2 ; 5 } 290: 08 95 ret 00000292 : void enc28j60ReadBuffer(uint16_t len, uint8_t* data) { 292: ac 01 movw r20, r24 294: fb 01 movw r30, r22 CSACTIVE; 296: 2a 98 cbi 0x05, 2 ; 5 // issue read command SPDR = ENC28J60_READ_BUF_MEM; 298: 8a e3 ldi r24, 0x3A ; 58 29a: 8e bd out 0x2e, r24 ; 46 waitspi(); 29c: 0d b4 in r0, 0x2d ; 45 29e: 07 fe sbrs r0, 7 2a0: fd cf rjmp .-6 ; 0x29c 2a2: 9a 01 movw r18, r20 2a4: df 01 movw r26, r30 2a6: 08 c0 rjmp .+16 ; 0x2b8 while(len) { len--; // read data SPDR = 0x00; 2a8: 1e bc out 0x2e, r1 ; 46 waitspi(); 2aa: 0d b4 in r0, 0x2d ; 45 2ac: 07 fe sbrs r0, 7 2ae: fd cf rjmp .-6 ; 0x2aa // issue read command SPDR = ENC28J60_READ_BUF_MEM; waitspi(); while(len) { len--; 2b0: 21 50 subi r18, 0x01 ; 1 2b2: 30 40 sbci r19, 0x00 ; 0 // read data SPDR = 0x00; waitspi(); *data = SPDR; 2b4: 8e b5 in r24, 0x2e ; 46 2b6: 8d 93 st X+, r24 { CSACTIVE; // issue read command SPDR = ENC28J60_READ_BUF_MEM; waitspi(); while(len) 2b8: 21 15 cp r18, r1 2ba: 31 05 cpc r19, r1 2bc: a9 f7 brne .-22 ; 0x2a8 SPDR = 0x00; waitspi(); *data = SPDR; data++; } *data='\0'; 2be: e4 0f add r30, r20 2c0: f5 1f adc r31, r21 2c2: 10 82 st Z, r1 CSPASSIVE; 2c4: 2a 9a sbi 0x05, 2 ; 5 } 2c6: 08 95 ret 000002c8 : void enc28j60WriteBuffer(uint16_t len, uint8_t* data) { 2c8: 9c 01 movw r18, r24 2ca: fb 01 movw r30, r22 CSACTIVE; 2cc: 2a 98 cbi 0x05, 2 ; 5 // issue write command SPDR = ENC28J60_WRITE_BUF_MEM; 2ce: 8a e7 ldi r24, 0x7A ; 122 2d0: 8e bd out 0x2e, r24 ; 46 waitspi(); 2d2: 0d b4 in r0, 0x2d ; 45 2d4: 07 fe sbrs r0, 7 2d6: fd cf rjmp .-6 ; 0x2d2 2d8: 08 c0 rjmp .+16 ; 0x2ea while(len) { len--; // write data SPDR = *data; 2da: 80 81 ld r24, Z 2dc: 8e bd out 0x2e, r24 ; 46 data++; waitspi(); 2de: 0d b4 in r0, 0x2d ; 45 2e0: 07 fe sbrs r0, 7 2e2: fd cf rjmp .-6 ; 0x2de // issue write command SPDR = ENC28J60_WRITE_BUF_MEM; waitspi(); while(len) { len--; 2e4: 21 50 subi r18, 0x01 ; 1 2e6: 30 40 sbci r19, 0x00 ; 0 // write data SPDR = *data; data++; 2e8: 31 96 adiw r30, 0x01 ; 1 { CSACTIVE; // issue write command SPDR = ENC28J60_WRITE_BUF_MEM; waitspi(); while(len) 2ea: 21 15 cp r18, r1 2ec: 31 05 cpc r19, r1 2ee: a9 f7 brne .-22 ; 0x2da // write data SPDR = *data; data++; waitspi(); } CSPASSIVE; 2f0: 2a 9a sbi 0x05, 2 ; 5 } 2f2: 08 95 ret 000002f4 : void enc28j60SetBank(uint8_t address) { 2f4: 1f 93 push r17 2f6: cf 93 push r28 2f8: df 93 push r29 2fa: 18 2f mov r17, r24 // set the bank (if needed) if((address & BANK_MASK) != Enc28j60Bank) 2fc: c8 2f mov r28, r24 2fe: d0 e0 ldi r29, 0x00 ; 0 300: c0 76 andi r28, 0x60 ; 96 302: d0 70 andi r29, 0x00 ; 0 304: 80 91 14 01 lds r24, 0x0114 308: 90 e0 ldi r25, 0x00 ; 0 30a: c8 17 cp r28, r24 30c: d9 07 cpc r29, r25 30e: 91 f0 breq .+36 ; 0x334 { // set the bank enc28j60WriteOp(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0)); 310: 80 ea ldi r24, 0xA0 ; 160 312: 6f e1 ldi r22, 0x1F ; 31 314: 43 e0 ldi r20, 0x03 ; 3 316: 0e 94 3c 01 call 0x278 ; 0x278 enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK)>>5); 31a: 95 e0 ldi r25, 0x05 ; 5 31c: d5 95 asr r29 31e: c7 95 ror r28 320: 9a 95 dec r25 322: e1 f7 brne .-8 ; 0x31c 324: 80 e8 ldi r24, 0x80 ; 128 326: 6f e1 ldi r22, 0x1F ; 31 328: 4c 2f mov r20, r28 32a: 0e 94 3c 01 call 0x278 ; 0x278 Enc28j60Bank = (address & BANK_MASK); 32e: 10 76 andi r17, 0x60 ; 96 330: 10 93 14 01 sts 0x0114, r17 } } 334: df 91 pop r29 336: cf 91 pop r28 338: 1f 91 pop r17 33a: 08 95 ret 0000033c : uint8_t enc28j60Read(uint8_t address) { 33c: 1f 93 push r17 33e: 18 2f mov r17, r24 // set the bank enc28j60SetBank(address); 340: 0e 94 7a 01 call 0x2f4 ; 0x2f4 // do the read return enc28j60ReadOp(ENC28J60_READ_CTRL_REG, address); 344: 80 e0 ldi r24, 0x00 ; 0 346: 61 2f mov r22, r17 348: 0e 94 27 01 call 0x24e ; 0x24e } 34c: 1f 91 pop r17 34e: 08 95 ret 00000350 : void enc28j60Write(uint8_t address, uint8_t data) { 350: 0f 93 push r16 352: 1f 93 push r17 354: 18 2f mov r17, r24 356: 06 2f mov r16, r22 // set the bank enc28j60SetBank(address); 358: 0e 94 7a 01 call 0x2f4 ; 0x2f4 // do the write enc28j60WriteOp(ENC28J60_WRITE_CTRL_REG, address, data); 35c: 80 e4 ldi r24, 0x40 ; 64 35e: 61 2f mov r22, r17 360: 40 2f mov r20, r16 362: 0e 94 3c 01 call 0x278 ; 0x278 } 366: 1f 91 pop r17 368: 0f 91 pop r16 36a: 08 95 ret 0000036c : void enc28j60PhyWrite(uint8_t address, uint16_t data) { 36c: 0f 93 push r16 36e: 1f 93 push r17 370: 98 2f mov r25, r24 372: 16 2f mov r17, r22 374: 07 2f mov r16, r23 // set the PHY register address enc28j60Write(MIREGADR, address); 376: 84 ed ldi r24, 0xD4 ; 212 378: 69 2f mov r22, r25 37a: 0e 94 a8 01 call 0x350 ; 0x350 // write the PHY data enc28j60Write(MIWRL, data); 37e: 86 ed ldi r24, 0xD6 ; 214 380: 61 2f mov r22, r17 382: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MIWRH, data>>8); 386: 87 ed ldi r24, 0xD7 ; 215 388: 60 2f mov r22, r16 38a: 0e 94 a8 01 call 0x350 ; 0x350 can be achieved. */ void _delay_loop_1(uint8_t __count) { __asm__ volatile ( 38e: 18 e2 ldi r17, 0x28 ; 40 390: 03 c0 rjmp .+6 ; 0x398 392: 81 2f mov r24, r17 394: 8a 95 dec r24 396: f1 f7 brne .-4 ; 0x394 // wait until the PHY write completes while(enc28j60Read(MISTAT) & MISTAT_BUSY){ 398: 8a ee ldi r24, 0xEA ; 234 39a: 0e 94 9e 01 call 0x33c ; 0x33c 39e: 80 fd sbrc r24, 0 3a0: f8 cf rjmp .-16 ; 0x392 _delay_us(15); } } 3a2: 1f 91 pop r17 3a4: 0f 91 pop r16 3a6: 08 95 ret 000003a8 : void enc28j60Init(uint8_t* macaddr) { 3a8: cf 93 push r28 3aa: df 93 push r29 3ac: ec 01 movw r28, r24 // initialize I/O ENC28J60_CONTROL_DDR |= 1< 3d4: 84 ef ldi r24, 0xF4 ; 244 3d6: 91 e0 ldi r25, 0x01 ; 1 milliseconds can be achieved. */ void _delay_loop_2(uint16_t __count) { __asm__ volatile ( 3d8: 28 ec ldi r18, 0xC8 ; 200 3da: 30 e0 ldi r19, 0x00 ; 0 3dc: f9 01 movw r30, r18 3de: 31 97 sbiw r30, 0x01 ; 1 3e0: f1 f7 brne .-4 ; 0x3de __ticks = (uint16_t) (__ms * 10.0); while(__ticks) { // wait 1/10 ms _delay_loop_2(((F_CPU) / 4e3) / 10); __ticks --; 3e2: 01 97 sbiw r24, 0x01 ; 1 __ticks = 1; else if (__tmp > 65535) { // __ticks = requested delay in 1/10 ms __ticks = (uint16_t) (__ms * 10.0); while(__ticks) 3e4: d9 f7 brne .-10 ; 0x3dc //while(!(enc28j60Read(ESTAT) & ESTAT_CLKRDY)); // do bank 0 stuff // initialize receive buffer // 16-bit transfers, must write low byte first // set receive buffer start address NextPacketPtr = RXSTART_INIT; 3e6: 10 92 16 01 sts 0x0116, r1 3ea: 10 92 15 01 sts 0x0115, r1 // Rx start enc28j60Write(ERXSTL, RXSTART_INIT&0xFF); 3ee: 88 e0 ldi r24, 0x08 ; 8 3f0: 60 e0 ldi r22, 0x00 ; 0 3f2: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ERXSTH, RXSTART_INIT>>8); 3f6: 89 e0 ldi r24, 0x09 ; 9 3f8: 60 e0 ldi r22, 0x00 ; 0 3fa: 0e 94 a8 01 call 0x350 ; 0x350 // set receive pointer address enc28j60Write(ERXRDPTL, RXSTART_INIT&0xFF); 3fe: 8c e0 ldi r24, 0x0C ; 12 400: 60 e0 ldi r22, 0x00 ; 0 402: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ERXRDPTH, RXSTART_INIT>>8); 406: 8d e0 ldi r24, 0x0D ; 13 408: 60 e0 ldi r22, 0x00 ; 0 40a: 0e 94 a8 01 call 0x350 ; 0x350 // RX end enc28j60Write(ERXNDL, RXSTOP_INIT&0xFF); 40e: 8a e0 ldi r24, 0x0A ; 10 410: 6e ef ldi r22, 0xFE ; 254 412: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ERXNDH, RXSTOP_INIT>>8); 416: 8b e0 ldi r24, 0x0B ; 11 418: 69 e1 ldi r22, 0x19 ; 25 41a: 0e 94 a8 01 call 0x350 ; 0x350 // TX start enc28j60Write(ETXSTL, TXSTART_INIT&0xFF); 41e: 84 e0 ldi r24, 0x04 ; 4 420: 6f ef ldi r22, 0xFF ; 255 422: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ETXSTH, TXSTART_INIT>>8); 426: 85 e0 ldi r24, 0x05 ; 5 428: 69 e1 ldi r22, 0x19 ; 25 42a: 0e 94 a8 01 call 0x350 ; 0x350 // TX end enc28j60Write(ETXNDL, TXSTOP_INIT&0xFF); 42e: 86 e0 ldi r24, 0x06 ; 6 430: 6f ef ldi r22, 0xFF ; 255 432: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ETXNDH, TXSTOP_INIT>>8); 436: 87 e0 ldi r24, 0x07 ; 7 438: 6f e1 ldi r22, 0x1F ; 31 43a: 0e 94 a8 01 call 0x350 ; 0x350 // Type ETH.DST // ARP BROADCAST // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9 // in binary these poitions are:11 0000 0011 1111 // This is hex 303F->EPMM0=0x3f,EPMM1=0x30 enc28j60Write(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN); 43e: 88 e3 ldi r24, 0x38 ; 56 440: 60 eb ldi r22, 0xB0 ; 176 442: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(EPMM0, 0x3f); 446: 88 e2 ldi r24, 0x28 ; 40 448: 6f e3 ldi r22, 0x3F ; 63 44a: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(EPMM1, 0x30); 44e: 89 e2 ldi r24, 0x29 ; 41 450: 60 e3 ldi r22, 0x30 ; 48 452: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(EPMCSL, 0xf9); 456: 80 e3 ldi r24, 0x30 ; 48 458: 69 ef ldi r22, 0xF9 ; 249 45a: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(EPMCSH, 0xf7); 45e: 81 e3 ldi r24, 0x31 ; 49 460: 67 ef ldi r22, 0xF7 ; 247 462: 0e 94 a8 01 call 0x350 ; 0x350 // // // do bank 2 stuff // enable MAC receive enc28j60Write(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS); 466: 80 ec ldi r24, 0xC0 ; 192 468: 6d e0 ldi r22, 0x0D ; 13 46a: 0e 94 a8 01 call 0x350 ; 0x350 // bring MAC out of reset enc28j60Write(MACON2, 0x00); 46e: 81 ec ldi r24, 0xC1 ; 193 470: 60 e0 ldi r22, 0x00 ; 0 472: 0e 94 a8 01 call 0x350 ; 0x350 // enable automatic padding to 60bytes and CRC operations enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN); 476: 80 e8 ldi r24, 0x80 ; 128 478: 62 ec ldi r22, 0xC2 ; 194 47a: 42 e3 ldi r20, 0x32 ; 50 47c: 0e 94 3c 01 call 0x278 ; 0x278 // set inter-frame gap (non-back-to-back) enc28j60Write(MAIPGL, 0x12); 480: 86 ec ldi r24, 0xC6 ; 198 482: 62 e1 ldi r22, 0x12 ; 18 484: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MAIPGH, 0x0C); 488: 87 ec ldi r24, 0xC7 ; 199 48a: 6c e0 ldi r22, 0x0C ; 12 48c: 0e 94 a8 01 call 0x350 ; 0x350 // set inter-frame gap (back-to-back) enc28j60Write(MABBIPG, 0x12); 490: 84 ec ldi r24, 0xC4 ; 196 492: 62 e1 ldi r22, 0x12 ; 18 494: 0e 94 a8 01 call 0x350 ; 0x350 // Set the maximum packet size which the controller will accept // Do not send packets longer than MAX_FRAMELEN: enc28j60Write(MAMXFLL, MAX_FRAMELEN&0xFF); 498: 8a ec ldi r24, 0xCA ; 202 49a: 68 e5 ldi r22, 0x58 ; 88 49c: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MAMXFLH, MAX_FRAMELEN>>8); 4a0: 8b ec ldi r24, 0xCB ; 203 4a2: 62 e0 ldi r22, 0x02 ; 2 4a4: 0e 94 a8 01 call 0x350 ; 0x350 // do bank 3 stuff // write MAC address // NOTE: MAC address in ENC28J60 is byte-backward enc28j60Write(MAADR5, macaddr[0]); 4a8: 84 ee ldi r24, 0xE4 ; 228 4aa: 68 81 ld r22, Y 4ac: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MAADR4, macaddr[1]); 4b0: 85 ee ldi r24, 0xE5 ; 229 4b2: 69 81 ldd r22, Y+1 ; 0x01 4b4: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MAADR3, macaddr[2]); 4b8: 82 ee ldi r24, 0xE2 ; 226 4ba: 6a 81 ldd r22, Y+2 ; 0x02 4bc: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MAADR2, macaddr[3]); 4c0: 83 ee ldi r24, 0xE3 ; 227 4c2: 6b 81 ldd r22, Y+3 ; 0x03 4c4: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MAADR1, macaddr[4]); 4c8: 80 ee ldi r24, 0xE0 ; 224 4ca: 6c 81 ldd r22, Y+4 ; 0x04 4cc: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(MAADR0, macaddr[5]); 4d0: 81 ee ldi r24, 0xE1 ; 225 4d2: 6d 81 ldd r22, Y+5 ; 0x05 4d4: 0e 94 a8 01 call 0x350 ; 0x350 // no loopback of transmitted frames enc28j60PhyWrite(PHCON2, PHCON2_HDLDIS); 4d8: 80 e1 ldi r24, 0x10 ; 16 4da: 60 e0 ldi r22, 0x00 ; 0 4dc: 71 e0 ldi r23, 0x01 ; 1 4de: 0e 94 b6 01 call 0x36c ; 0x36c // switch to bank 0 enc28j60SetBank(ECON1); 4e2: 8f e1 ldi r24, 0x1F ; 31 4e4: 0e 94 7a 01 call 0x2f4 ; 0x2f4 // enable interrutps enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE); 4e8: 80 e8 ldi r24, 0x80 ; 128 4ea: 6b e1 ldi r22, 0x1B ; 27 4ec: 40 ec ldi r20, 0xC0 ; 192 4ee: 0e 94 3c 01 call 0x278 ; 0x278 // enable packet reception enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN); 4f2: 80 e8 ldi r24, 0x80 ; 128 4f4: 6f e1 ldi r22, 0x1F ; 31 4f6: 44 e0 ldi r20, 0x04 ; 4 4f8: 0e 94 3c 01 call 0x278 ; 0x278 } 4fc: df 91 pop r29 4fe: cf 91 pop r28 500: 08 95 ret 00000502 : // read the revision of the chip: uint8_t enc28j60getrev(void) { return(enc28j60Read(EREVID)); 502: 82 e7 ldi r24, 0x72 ; 114 504: 0e 94 9e 01 call 0x33c ; 0x33c } 508: 08 95 ret 0000050a : void enc28j60PacketSend(uint16_t len, uint8_t* packet) { 50a: ef 92 push r14 50c: ff 92 push r15 50e: 0f 93 push r16 510: 1f 93 push r17 512: 8c 01 movw r16, r24 514: 7b 01 movw r14, r22 // Set the write pointer to start of transmit buffer area enc28j60Write(EWRPTL, TXSTART_INIT&0xFF); 516: 82 e0 ldi r24, 0x02 ; 2 518: 6f ef ldi r22, 0xFF ; 255 51a: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(EWRPTH, TXSTART_INIT>>8); 51e: 83 e0 ldi r24, 0x03 ; 3 520: 69 e1 ldi r22, 0x19 ; 25 522: 0e 94 a8 01 call 0x350 ; 0x350 // Set the TXND pointer to correspond to the packet size given enc28j60Write(ETXNDL, (TXSTART_INIT+len)&0xFF); 526: 60 2f mov r22, r16 528: 61 50 subi r22, 0x01 ; 1 52a: 86 e0 ldi r24, 0x06 ; 6 52c: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ETXNDH, (TXSTART_INIT+len)>>8); 530: 98 01 movw r18, r16 532: 21 50 subi r18, 0x01 ; 1 534: 36 4e sbci r19, 0xE6 ; 230 536: 87 e0 ldi r24, 0x07 ; 7 538: 63 2f mov r22, r19 53a: 0e 94 a8 01 call 0x350 ; 0x350 // write per-packet control byte (0x00 means use macon3 settings) enc28j60WriteOp(ENC28J60_WRITE_BUF_MEM, 0, 0x00); 53e: 8a e7 ldi r24, 0x7A ; 122 540: 60 e0 ldi r22, 0x00 ; 0 542: 40 e0 ldi r20, 0x00 ; 0 544: 0e 94 3c 01 call 0x278 ; 0x278 // copy the packet into the transmit buffer enc28j60WriteBuffer(len, packet); 548: c8 01 movw r24, r16 54a: b7 01 movw r22, r14 54c: 0e 94 64 01 call 0x2c8 ; 0x2c8 // send the contents of the transmit buffer onto the network enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS); 550: 80 e8 ldi r24, 0x80 ; 128 552: 6f e1 ldi r22, 0x1F ; 31 554: 48 e0 ldi r20, 0x08 ; 8 556: 0e 94 3c 01 call 0x278 ; 0x278 // Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12. if( (enc28j60Read(EIR) & EIR_TXERIF) ){ 55a: 8c e1 ldi r24, 0x1C ; 28 55c: 0e 94 9e 01 call 0x33c ; 0x33c 560: 81 ff sbrs r24, 1 562: 05 c0 rjmp .+10 ; 0x56e enc28j60WriteOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS); 564: 80 ea ldi r24, 0xA0 ; 160 566: 6f e1 ldi r22, 0x1F ; 31 568: 48 e0 ldi r20, 0x08 ; 8 56a: 0e 94 3c 01 call 0x278 ; 0x278 } } 56e: 1f 91 pop r17 570: 0f 91 pop r16 572: ff 90 pop r15 574: ef 90 pop r14 576: 08 95 ret 00000578 : } enc28j60PacketSend(42,buf); } void make_echo_reply_from_request(uint8_t *buf,uint16_t len)// функция генерации понг-ответа для отправления { 578: 0f 93 push r16 57a: 1f 93 push r17 57c: cf 93 push r28 57e: df 93 push r29 580: ec 01 movw r28, r24 582: 8b 01 movw r16, r22 make_eth(buf); 584: 0e 94 f3 00 call 0x1e6 ; 0x1e6 make_ip(buf); 588: ce 01 movw r24, r28 58a: 0e 94 16 01 call 0x22c ; 0x22c buf[ICMP_TYPE_P]=ICMP_TYPE_ECHOREPLY_V; 58e: 1a a2 std Y+34, r1 ; 0x22 if (buf[ICMP_CHECKSUM_P] > (0xff-0x08)) 590: 8c a1 ldd r24, Y+36 ; 0x24 592: 88 3f cpi r24, 0xF8 ; 248 594: 18 f0 brcs .+6 ; 0x59c { buf[ICMP_CHECKSUM_P+1]++; 596: 8d a1 ldd r24, Y+37 ; 0x25 598: 8f 5f subi r24, 0xFF ; 255 59a: 8d a3 std Y+37, r24 ; 0x25 } buf[ICMP_CHECKSUM_P]+=0x08; 59c: 8c a1 ldd r24, Y+36 ; 0x24 59e: 88 5f subi r24, 0xF8 ; 248 5a0: 8c a3 std Y+36, r24 ; 0x24 enc28j60PacketSend(len,buf); 5a2: c8 01 movw r24, r16 5a4: be 01 movw r22, r28 5a6: 0e 94 85 02 call 0x50a ; 0x50a } 5aa: df 91 pop r29 5ac: cf 91 pop r28 5ae: 1f 91 pop r17 5b0: 0f 91 pop r16 5b2: 08 95 ret 000005b4 : } fill_ip_hdr_checksum(buf); } void make_arp_answer_from_request(uint8_t *buf)// функция генерации ARP-ответа для отправления { 5b4: cf 93 push r28 5b6: df 93 push r29 5b8: ec 01 movw r28, r24 uint8_t i=0; make_eth(buf); 5ba: 0e 94 f3 00 call 0x1e6 ; 0x1e6 buf[ETH_ARP_OPCODE_H_P]=ETH_ARP_OPCODE_REPLY_H_V; 5be: 1c 8a std Y+20, r1 ; 0x14 buf[ETH_ARP_OPCODE_L_P]=ETH_ARP_OPCODE_REPLY_L_V; 5c0: 82 e0 ldi r24, 0x02 ; 2 5c2: 8d 8b std Y+21, r24 ; 0x15 5c4: fe 01 movw r30, r28 5c6: aa e0 ldi r26, 0x0A ; 10 5c8: b1 e0 ldi r27, 0x01 ; 1 while(i<6) { buf[ETH_ARP_DST_MAC_P+i]=buf[ETH_ARP_SRC_MAC_P+i]; 5ca: 86 89 ldd r24, Z+22 ; 0x16 5cc: 80 a3 std Z+32, r24 ; 0x20 buf[ETH_ARP_SRC_MAC_P+i]=macaddr[i]; 5ce: 8d 91 ld r24, X+ 5d0: 86 8b std Z+22, r24 ; 0x16 5d2: 31 96 adiw r30, 0x01 ; 1 { uint8_t i=0; make_eth(buf); buf[ETH_ARP_OPCODE_H_P]=ETH_ARP_OPCODE_REPLY_H_V; buf[ETH_ARP_OPCODE_L_P]=ETH_ARP_OPCODE_REPLY_L_V; while(i<6) 5d4: 81 e0 ldi r24, 0x01 ; 1 5d6: a0 31 cpi r26, 0x10 ; 16 5d8: b8 07 cpc r27, r24 5da: b9 f7 brne .-18 ; 0x5ca 5dc: fe 01 movw r30, r28 5de: 7c 96 adiw r30, 0x1c ; 28 5e0: a0 e1 ldi r26, 0x10 ; 16 5e2: b1 e0 ldi r27, 0x01 ; 1 i++; } i=0; while(i<4) { buf[ETH_ARP_DST_IP_P+i]=buf[ETH_ARP_SRC_IP_P+i]; 5e4: 80 81 ld r24, Z 5e6: 82 87 std Z+10, r24 ; 0x0a buf[ETH_ARP_SRC_IP_P+i]=ipaddr[i]; 5e8: 8d 91 ld r24, X+ 5ea: 81 93 st Z+, r24 buf[ETH_ARP_DST_MAC_P+i]=buf[ETH_ARP_SRC_MAC_P+i]; buf[ETH_ARP_SRC_MAC_P+i]=macaddr[i]; i++; } i=0; while(i<4) 5ec: 81 e0 ldi r24, 0x01 ; 1 5ee: a4 31 cpi r26, 0x14 ; 20 5f0: b8 07 cpc r27, r24 5f2: c1 f7 brne .-16 ; 0x5e4 { buf[ETH_ARP_DST_IP_P+i]=buf[ETH_ARP_SRC_IP_P+i]; buf[ETH_ARP_SRC_IP_P+i]=ipaddr[i]; i++; } enc28j60PacketSend(42,buf); 5f4: 8a e2 ldi r24, 0x2A ; 42 5f6: 90 e0 ldi r25, 0x00 ; 0 5f8: be 01 movw r22, r28 5fa: 0e 94 85 02 call 0x50a ; 0x50a } 5fe: df 91 pop r29 600: cf 91 pop r28 602: 08 95 ret 00000604 : // The packet will by headed by an ethernet header. // maxlen The maximum acceptable length of a retrieved packet. // packet Pointer where packet data should be stored. // Returns: Packet length in bytes if a packet was retrieved, zero otherwise. uint16_t enc28j60PacketReceive(uint16_t maxlen, uint8_t* packet) { 604: af 92 push r10 606: bf 92 push r11 608: cf 92 push r12 60a: df 92 push r13 60c: ef 92 push r14 60e: ff 92 push r15 610: 0f 93 push r16 612: 1f 93 push r17 614: cf 93 push r28 616: df 93 push r29 618: 6c 01 movw r12, r24 61a: 5b 01 movw r10, r22 uint16_t rxstat; uint16_t len; // check if a packet has been received and buffered //if( !(enc28j60Read(EIR) & EIR_PKTIF) ){ // The above does not work. See Rev. B4 Silicon Errata point 6. if( enc28j60Read(EPKTCNT) ==0 ){ 61c: 89 e3 ldi r24, 0x39 ; 57 61e: 0e 94 9e 01 call 0x33c ; 0x33c 622: 88 23 and r24, r24 624: 19 f4 brne .+6 ; 0x62c 626: 00 e0 ldi r16, 0x00 ; 0 628: 10 e0 ldi r17, 0x00 ; 0 62a: 5a c0 rjmp .+180 ; 0x6e0 return(0); } // Set the read pointer to the start of the received packet enc28j60Write(ERDPTL, (NextPacketPtr)); 62c: 60 91 15 01 lds r22, 0x0115 630: 10 91 16 01 lds r17, 0x0116 634: 80 e0 ldi r24, 0x00 ; 0 636: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ERDPTH, (NextPacketPtr)>>8); 63a: 81 e0 ldi r24, 0x01 ; 1 63c: 61 2f mov r22, r17 63e: 0e 94 a8 01 call 0x350 ; 0x350 // read the next packet pointer NextPacketPtr = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0); 642: 8a e3 ldi r24, 0x3A ; 58 644: 60 e0 ldi r22, 0x00 ; 0 646: 0e 94 27 01 call 0x24e ; 0x24e 64a: 18 2f mov r17, r24 NextPacketPtr |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0)<<8; 64c: 8a e3 ldi r24, 0x3A ; 58 64e: 60 e0 ldi r22, 0x00 ; 0 650: 0e 94 27 01 call 0x24e ; 0x24e 654: 38 2f mov r19, r24 656: 20 e0 ldi r18, 0x00 ; 0 658: c1 2f mov r28, r17 65a: d0 e0 ldi r29, 0x00 ; 0 65c: c2 2b or r28, r18 65e: d3 2b or r29, r19 660: d0 93 16 01 sts 0x0116, r29 664: c0 93 15 01 sts 0x0115, r28 // read the packet length (see datasheet page 43) len = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0); 668: 8a e3 ldi r24, 0x3A ; 58 66a: 60 e0 ldi r22, 0x00 ; 0 66c: 0e 94 27 01 call 0x24e ; 0x24e 670: e8 2e mov r14, r24 len |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0)<<8; 672: 8a e3 ldi r24, 0x3A ; 58 674: 60 e0 ldi r22, 0x00 ; 0 676: 0e 94 27 01 call 0x24e ; 0x24e 67a: f8 2e mov r15, r24 len-=4; //remove the CRC count // read the receive status (see datasheet page 43) rxstat = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0); 67c: 8a e3 ldi r24, 0x3A ; 58 67e: 60 e0 ldi r22, 0x00 ; 0 680: 0e 94 27 01 call 0x24e ; 0x24e 684: 08 2f mov r16, r24 686: 10 e0 ldi r17, 0x00 ; 0 rxstat |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0)<<8; 688: 8a e3 ldi r24, 0x3A ; 58 68a: 60 e0 ldi r22, 0x00 ; 0 68c: 0e 94 27 01 call 0x24e ; 0x24e len=maxlen-1; } // check CRC and symbol errors (see datasheet page 44, table 7-3): // The ERXFCON.CRCEN is set by default. Normally we should not // need to check this. if ((rxstat & 0x80)==0){ 690: 38 2f mov r19, r24 692: 20 e0 ldi r18, 0x00 ; 0 694: 20 2b or r18, r16 696: 31 2b or r19, r17 698: 27 fd sbrc r18, 7 69a: 03 c0 rjmp .+6 ; 0x6a2 69c: 00 e0 ldi r16, 0x00 ; 0 69e: 10 e0 ldi r17, 0x00 ; 0 6a0: 12 c0 rjmp .+36 ; 0x6c6 enc28j60Write(ERDPTH, (NextPacketPtr)>>8); // read the next packet pointer NextPacketPtr = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0); NextPacketPtr |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0)<<8; // read the packet length (see datasheet page 43) len = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0); 6a2: 0e 2d mov r16, r14 6a4: 10 e0 ldi r17, 0x00 ; 0 len |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0)<<8; 6a6: 9f 2d mov r25, r15 6a8: 80 e0 ldi r24, 0x00 ; 0 6aa: 08 2b or r16, r24 6ac: 19 2b or r17, r25 len-=4; //remove the CRC count 6ae: c6 01 movw r24, r12 6b0: 01 97 sbiw r24, 0x01 ; 1 6b2: 04 50 subi r16, 0x04 ; 4 6b4: 10 40 sbci r17, 0x00 ; 0 6b6: 80 17 cp r24, r16 6b8: 91 07 cpc r25, r17 6ba: 08 f4 brcc .+2 ; 0x6be 6bc: 8c 01 movw r16, r24 if ((rxstat & 0x80)==0){ // invalid len=0; }else{ // copy the packet from the receive buffer enc28j60ReadBuffer(len, packet); 6be: c8 01 movw r24, r16 6c0: b5 01 movw r22, r10 6c2: 0e 94 49 01 call 0x292 ; 0x292 } // Move the RX read pointer to the start of the next received packet // This frees the memory we just read out enc28j60Write(ERXRDPTL, (NextPacketPtr)); 6c6: 8c e0 ldi r24, 0x0C ; 12 6c8: 6c 2f mov r22, r28 6ca: 0e 94 a8 01 call 0x350 ; 0x350 enc28j60Write(ERXRDPTH, (NextPacketPtr)>>8); 6ce: 8d e0 ldi r24, 0x0D ; 13 6d0: 6d 2f mov r22, r29 6d2: 0e 94 a8 01 call 0x350 ; 0x350 // decrement the packet counter indicate we are done with this packet enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC); 6d6: 80 e8 ldi r24, 0x80 ; 128 6d8: 6e e1 ldi r22, 0x1E ; 30 6da: 40 e4 ldi r20, 0x40 ; 64 6dc: 0e 94 3c 01 call 0x278 ; 0x278 return(len); } 6e0: c8 01 movw r24, r16 6e2: df 91 pop r29 6e4: cf 91 pop r28 6e6: 1f 91 pop r17 6e8: 0f 91 pop r16 6ea: ff 90 pop r15 6ec: ef 90 pop r14 6ee: df 90 pop r13 6f0: cf 90 pop r12 6f2: bf 90 pop r11 6f4: af 90 pop r10 6f6: 08 95 ret 000006f8

: static uint8_t mymac[6] = {0x54,0x55,0x58,0x10,0x00,0x24};// прописываем MAC-адрес устройства static uint8_t myip[4] = {192,168,1,25};// прописываем IP-адрес устройства #define BUFFER_SIZE 400// указываем размер буфера для приема данных static uint8_t buf[BUFFER_SIZE+1];//инициализируем массив данных для буфера int main(void)// главная функция программы { 6f8: 0f 93 push r16 6fa: 1f 93 push r17 6fc: cf 93 push r28 6fe: df 93 push r29 PORTD=0x00; 700: 1b b8 out 0x0b, r1 ; 11 DDRD|=0xff; 702: 8a b1 in r24, 0x0a ; 10 704: 8f ef ldi r24, 0xFF ; 255 706: 8a b9 out 0x0a, r24 ; 10 uint16_t plen; CLKPR=(1< _delay_ms(10); enc28j60Init(mymac);//запускаем функцию инициализации ENC28J60 71a: 80 e0 ldi r24, 0x00 ; 0 71c: 91 e0 ldi r25, 0x01 ; 1 71e: 0e 94 d4 01 call 0x3a8 ; 0x3a8 722: 00 e4 ldi r16, 0x40 ; 64 724: 1c e9 ldi r17, 0x9C ; 156 726: c8 01 movw r24, r16 728: 01 97 sbiw r24, 0x01 ; 1 72a: f1 f7 brne .-4 ; 0x728 _delay_ms(20); enc28j60PhyWrite(PHLCON,0x476);//настраиваем режим работы светодиодов ENC28J60:один светодиод индицирует статус соединения,другой-передачу и прием 72c: 84 e1 ldi r24, 0x14 ; 20 72e: 66 e7 ldi r22, 0x76 ; 118 730: 74 e0 ldi r23, 0x04 ; 4 732: 0e 94 b6 01 call 0x36c ; 0x36c 736: c8 01 movw r24, r16 738: 01 97 sbiw r24, 0x01 ; 1 73a: f1 f7 brne .-4 ; 0x738 _delay_ms(20); init_ip_arp(mymac,myip);//запускаем функцию присваивания MAC- адреса и IP-адреса для последующей передачи 73c: 80 e0 ldi r24, 0x00 ; 0 73e: 91 e0 ldi r25, 0x01 ; 1 740: 66 e0 ldi r22, 0x06 ; 6 742: 71 e0 ldi r23, 0x01 ; 1 744: 0e 94 97 00 call 0x12e ; 0x12e while(1) { plen = enc28j60PacketReceive(BUFFER_SIZE, buf);//запускаем функцию приема пакетов от ENC28J60 748: 80 e9 ldi r24, 0x90 ; 144 74a: 91 e0 ldi r25, 0x01 ; 1 74c: 67 e1 ldi r22, 0x17 ; 23 74e: 71 e0 ldi r23, 0x01 ; 1 750: 0e 94 02 03 call 0x604 ; 0x604 754: ec 01 movw r28, r24 if(plen==0)// если принятых данных нет 756: 00 97 sbiw r24, 0x00 ; 0 758: b9 f3 breq .-18 ; 0x748 { continue;//то перейти на начало цикла while } if(eth_type_is_arp_and_my_ip(buf,plen))// если полученные данные ARP-запрос,адресованный нам 75a: 87 e1 ldi r24, 0x17 ; 23 75c: 91 e0 ldi r25, 0x01 ; 1 75e: be 01 movw r22, r28 760: 0e 94 b7 00 call 0x16e ; 0x16e 764: 88 23 and r24, r24 766: 29 f0 breq .+10 ; 0x772 { make_arp_answer_from_request(buf);//то сгенерировать и отправить ARP-ответ 768: 87 e1 ldi r24, 0x17 ; 23 76a: 91 e0 ldi r25, 0x01 ; 1 76c: 0e 94 da 02 call 0x5b4 ; 0x5b4 770: eb cf rjmp .-42 ; 0x748 continue;// перейти на начало цикла while } if(eth_type_is_ip_and_my_ip(buf,plen)==0)// если полученные данные являются ip-пакетом и адресованы не нам 772: 87 e1 ldi r24, 0x17 ; 23 774: 91 e0 ldi r25, 0x01 ; 1 776: be 01 movw r22, r28 778: 0e 94 d3 00 call 0x1a6 ; 0x1a6 77c: 88 23 and r24, r24 77e: 21 f3 breq .-56 ; 0x748 { continue;// перейти на начало цикла while } if(buf[IP_PROTO_P]==IP_PROTO_ICMP_V && buf[ICMP_TYPE_P]==ICMP_TYPE_ECHOREQUEST_V)//если в полученном ip-пакете содержится запрос "пинг" 780: 80 91 2e 01 lds r24, 0x012E 784: 81 30 cpi r24, 0x01 ; 1 786: 01 f7 brne .-64 ; 0x748 788: 80 91 39 01 lds r24, 0x0139 78c: 88 30 cpi r24, 0x08 ; 8 78e: e1 f6 brne .-72 ; 0x748 { make_echo_reply_from_request(buf,plen);// отправим ответ "понг" 790: 87 e1 ldi r24, 0x17 ; 23 792: 91 e0 ldi r25, 0x01 ; 1 794: be 01 movw r22, r28 796: 0e 94 bc 02 call 0x578 ; 0x578 79a: d6 cf rjmp .-84 ; 0x748 0000079c <_exit>: 79c: f8 94 cli 0000079e <__stop_program>: 79e: ff cf rjmp .-2 ; 0x79e <__stop_program>